Semiconductor Process Overview

Why Learn Semiconductor Processes in the South Gyeongsang Region

There are no large semiconductor integrated factories (fabs) in the South Gyeongsang region. However, precision machining companies in Changwon and Gimhae are cutting semiconductor equipment parts, and chemical and gas processing facilities are located in Ulsan's chemical complex. Automotive electronics (ECU, sensors) and medical device assembly lines are already operating in clean rooms.

In other words, people who understand semiconductor process language are needed even without entering a fab. When a customer asks, "What is the particle specification for this part?" or "What is the required roughness (roughness) inside the chamber?" you need to understand what they mean in order to provide a quotation and pass the inspection.

From a Wafer to a Chip

The big picture consists of just two parts.

[Front-end — Fab]                        [Back-end — Assembly & Test]
Circuits are created on the wafer      →      Chips are cut, packaged, and tested
Clean room, hundreds of steps, 2-3 months              Dicing, bonding, molding, testing

The 8 Major Processes at a Glance

The Most Important Fact — Steps 3 to 7 Are Repeated

A common misunderstanding among new employees is that "you go through the 8 steps one by one in order." In reality, every time a layer is created, a set of photolithography → etching → deposition → (ion implantation if needed) is repeated, and this set is repeated dozens of times. The latest logic chips have more than 10 layers of metal wiring.

That's why it takes more than two months for a single wafer to go through a fab and come out. If even one step is done incorrectly in the middle, all the costs incurred so far are lost. This is why the semiconductor industry is especially strict about procedures.

Why Photolithography Is Critical

If I had to pick one of the eight major processes, it would be photolithography. The reason is simple.

• It is the only process that determines the linewidth (circuit thickness). Etching and deposition follow the pattern drawn by photolithography.
• Since it is repeated as many times as the number of layers, it accounts for the largest share of wafer processing costs and time. (Although the number of steps itself is much higher for deposition, etching, and cleaning, the bottleneck in cost and cycle time is photolithography.)
• Exposure equipment is the most expensive equipment in the fab. That's why when photolithography equipment is down, the overall line utilization rate drops.

The Formula That Determines Resolution

How thin a line can be drawn is summarized by the Rayleigh formula.

Resolution R = k1 × λ / NA

  λ  = Wavelength of light (shorter is better)
  NA = Numerical aperture of the lens (larger is better)
  k1 = Process coefficient (reduced by technology, theoretical lower limit 0.25)

[ArF Immersion]  λ=193nm, NA=1.35, k1=0.3
   R = 0.3 × 193 / 1.35 = 42.9nm

[EUV]         λ=13.5nm, NA=0.33, k1=0.3
   R = 0.3 × 13.5 / 0.33 = 12.3nm

Shortening the wavelength is the most certain method, so the exposure light source has been continuously getting shorter.

Exposure Equipment Evolved from "Stepper" to "Scanner"

The entire wafer is not printed at once. It is exposed in small shots, moving slightly and repeating the exposure. Initially, it used a stepper that stopped to expose and then moved, but now it uses a scanner that moves the mask and wafer in opposite directions at the same time.

Misunderstanding About Linewidth Numbers

The "5nm process" in "5nm process" is not an actual physical measurement, but a name indicating the generation. It's not a value measured with a ruler like a drawing dimension. In practice, what is managed is the CD (Critical Dimension, critical dimension), a real measured value.

> To exceed the limit, multi-patterning is used, where a layer is drawn twice or four times. As the number of processes increases, so do costs and chances of defects. This is why "miniaturization is not necessarily cost reduction."

Internal Order of the Photolithography Process

Overlay is managed more strictly than linewidth. Even if you draw a thin line, if it's misaligned with the lower layer, the circuit won't connect.

Comparison of Etching, Deposition, and Ion Implantation

Wet etching uses hydrofluoric acid (HF) solutions. Since it is very effective at dissolving oxide films, it is also extremely dangerous to humans.

> Hydrofluoric acid may not cause immediate pain if it comes into contact with the skin. Hours later, it can cause severe pain and damage to the bones, and if it comes into contact with a large area, it can cause hypocalcemia and even death. The most dangerous judgment is thinking, "It doesn't itch, so it's okay." Detailed response is covered in the clean room rules section.

Three Common Misconceptions for Newcomers

First Week Checklist

• Determine whether our line is front-end or back-end
• Identify which of the eight major processes I will be responsible for and what the previous and next processes are
• List of chemicals and gases used in our process and the location of the MSDS
• Control parameters in our process (which of film thickness, CD, or dose is the target)
• How to read lot (Lot) and wafer ID, and the system for checking history